The present invention generally relates to computer memory technology, and more particularly relates to magnetic random access memory (MRAM).
Magnetic random access memory (MRAM) is based on magnetic tunnel junctions (MTJ). An MTJ consists of two magnetic films: a pinned layer (PL) and a free layer (FL). The direction of the magnetization of the PL is pinned or fixed, while the magnetization of the FL is programmable to be either parallel (logical “0” state) or anti-parallel (logical “1” state) to that of the PL in the “WRITE” operation. A thin tunnel barrier (formed, e.g., of aluminum oxide) is sandwiched between the PL and the FL, and the resistance of the MRAM depends on the direction of the FL magnetization relative to the PL's magnetization. The state of the MRAM is sensed in the “READ” operation by comparing the resistance of the tunnel junction to standard cells.
FIGS. 1A-1C are cross sectional diagrams illustrating various conventional techniques for forming MTJ stacks. In order to measure the resistance of an MTJ during the READ operation, two contacts (one each to the top and bottom of the MTJ) are necessary. The top contact is generally formed using one or two standard techniques. FIG. 1A, for example, illustrates an MTJ stack 100a that is patterned using a thick (e.g., approximately 1000 Angstroms) conductive hardmask 104a. The bitline 102a is sunk to contact the top of the hardmask 104a, thereby making electrical contact with the tunnel junction 106a. While this technique is relatively simple and inexpensive, the tall hardmask 104a is a source of shadowing for Ion Beam Etch (IBE)-based tunnel junction patterning.
FIG. 1B, on the other hand, illustrates an MTJ stack 100b that is patterned using a thin (e.g., approximately 400-600 Angstroms) hardmask 104b. In this case, the bitline 102b is terminated above the top of the hardmask 104b, and a via (VJ) 108b is dropped for electrical contact to the tunnel junction 106b. While the thin hardmask 104b minimizes shadowing (e.g., from tilted IBE or from any beam divergence in vertical IBE), this technique suffers from potential incompatibility with any ferromagnetic liner scheme, as discussed in further detail below.
FIG. 1C illustrates an MTJ stack 100c in which the bitline 102c is clad on three sides (all except the side facing the tunnel junction 106c) with a top ferromagnetic liner (TFML) 110c, in order to maximize the magnetic field generated per unit of current. Fabrication of TFMLs poses a particular challenge, because it requires either extraction of magnetic materials from the bottom of a damascene trench or a smooth trench bottom.
Therefore, there is a need in the art for a method and apparatus for bitline and contact via integration in magnetic random access memory arrays.